ABI-6400·ϼ-ɵ·߲/·ϲ-ɵ·-
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ABI-6400·ϼ
أӢ

̣ӢABI

гۣ
ABI-6400·ϼ ص/ܲ

ӢABI-6400·ϼ
ӢABI-6400·ϼ

ӢABI-6400·ϼDzƷͻ
 
1)ƷСᣬUSBӿڣʺЯ
2)64·ּɵ·ԣ64·V-I߲ԣ1·v-i̽
3)ͬһͬһʱɶֲԣܲԣV-I߲ԣ¶ȹյϵԣ״̬ԣܹܽŵѹ
4)ԿԪͨͼ񻯵ı༭ԶԿ⣬ԿԿ
5)Էdz򵥣ͨͼλIJԿ༭ݵ·ԭ뼤ͺżı׼ӦźţٽԿ⣬·Ĺܡ
6)·׷ٿԿҵ·
7)V-IƯյϵⶨҳȶ
8)V-Iߵѹɨ跶Χ-10v~+10v ɨѹΧ2.5VɵΪǶԳƵѹɨźţɨźſɴXʮ֡
8)߼ƽֵԶ塣趨DZ׼߼ƽֵ鲻ȶԪ
9)߼ƽֵԶɨ,ȷϵͳ߼ƽֵֵ,趨ѭֲȶĴ.
10)߲ԺУٲԪ߲Ժ߲Թȫһ
12)ϵͳ64·Ļ64ͨΪλͨ䣬ֱ256ͨ
 
Ʒܼص㣺

1)ֲͨ:64·(䵽256ͨ).
2)ģͨ64·(䵽256ͨ).
3)ͨ:4·.߾źŸ빦:ڽ߾ȷȷԹϵ̬(74LS373,74LS245,)ṩ4·߾źš
4)ձԪĶϢ,һͬʱɶֲ:icܲ,V-I߲,߹յ¶ȱ仯ϵ,ܽŵѹֵ,ܽ״̬ʾ,
5)ܹԶ߼ƽ߼/߹ܲԣֲԪ⣬Ԫ:TTL,CMOS,Memory,Interface,LSI,CPU,PAL.
6)߼ƽֵԶ塣
7)߼ƽֵԶɨ,ȷϵͳ߼ƽֵ,趨ѭֲȶĴ.
8)߼ʱͼʾʱѹֵʾ,վòϢ
9)ICͺʶԱʶ򱻲ͺŵɡߡߡͺʶԡ
10)д洢ܲ:Լ2k8256k8EPROMжȡ,Աȼϴ,ɽ߻߲.ɲȡߣߣѧϰ/ȽϵIJԷȰѺðEPROMеij浽ϣٺͻϵͬеijбȽϲԣԽλ洢ԪַϣӡõַȷʹĴ
11)V-Iģ:V-I߲ͨȽϺúͻ·Ӧܽŵ߲.ɰѹ϶λ·.V-IԲ漰ܽŽе,װ,κηװʽɽв,V-I߲·ӵ,԰ȫ
12)5V/5AֱԴ̿Զ,йѹ.ϵͳԶ,趨ӳʱ.͵·IJԡ
13)V-I߲Թ:λԪֱӽв,64ͨ䵽256ͨ,Եѹ2.55Vʽ,ϵͳԶ趨.
14)ͼλԪԿı༭,ͨ߼ʱɲͼλԶ༭ݵĽԿûеԪ⡣
15)·ԣͨͼ񻯲Կ༭߿Ըݵ·ԭͼ·ʱͼλIJԿ룬ԶͨIJԼźţݵ·ԭͨӦʱźţԿⱣڲԿУԱպʹá
16)·ܣε͵Χͼı仯ʾֵСԶ̽Уܡ˹ܿԼ··ĵֵ·㡣
17)ӢIJСusbӵ
18)V-I߲Եѹ-10v~+10vڿԵѹԲһ磺-2.5v~+10v ޶ȵر֤Եİȫԡ
19)豸64·ͨΪ׼䣬ֱ256·֤Ե·Ϊ256·
20)V-I߲,Թ۲߹յ¶ȱ仯ϵڷһЩķǹ̶Թ(Ϊ)
21)ּɵ·м缫·Զϼ衣
22)V-I߲Ծеͨ̽ʲԹܣV-I߲
23)LSIģɵ·߹ܼ״̬ԣɲȡѧϰȽϵķʽһЩLSIйܼ״̬ԡ
 

ּɵ·Բ  
ͨ: 64ͨչ256ͨ
߸źŵ: 4ͨor 8ͨ
ʵʱȶԹ: ж64ͨ, 128ͨ
ѹ: TTL/CMOS ׼
: ͬ߼ƽֵ
  һH-L 80mA @ 0.6V
  һ L-H 200mA @ 2V
  Max. 400mA
ѹת: >100V/µs
ѹΧ: +/-10V
迹: 10k
߼̬: ̬򿪼· (ڶɳ趨)
߼̬: Low, high, ̬ (tri-state)
ѹΧ: <0.5V, >5.5V
ʱ: ݱԪ
Էʽ: ߼߲ (߲Ժ)

Դ  
ԶԴ: 1 x 5V @ 5A ̶ʽ
  ( 2 x 5V @ 5A ̶ʽ for 128ŵ)
ѹ: 7V
: 7A

ģʽ  
(Single): β
ѭ(Loop): , ʽѭ(PASSFAIL)
Զɨ: ҵΪϸ߼ƽֵ

߼ƽֵ趨  
С: 100mV
źλ׼Low levels: TTL 0.1V to 1.1V
  CMOS 0.1V to 1.5V
ת̬λ׼Switching levels: TTL 1.0V to 2.3V
  CMOS 1.0V to 3.0V
źλ׼High levels: TTL 1.9V to 4.9V
  CMOS 1.9V to 4.9V
ɨ߼ΧSwept low levels: TTL 0.1V to 1.1V
  CMOS 0.1V to 1.5V
ɨ߼ת̬ΧSwept switching levels: TTL 1.2V
  CMOS 2.5V
ɨ߼ΧSwept high levels: TTL 1.9V to 4.9V
  CMOS 1.9V to 4.9V

Թܼ
ɵ·ܲ ݲԿĹܽвԣԪԭֵв
ԪԲ
·״̬ Short circuit detection
ӣ״̬ Floating input detection
·״̬ Open circuit detection
״̬ Linked pin detection
ѹVoltage: С 10mV Χ +/-10V
߼״̬ Logic state detection
VI߲: ͨ64 C 256չ
ѹ趨Χ -10V to +10V (趨)÷ǶԳƵѹɨ
Ե 1mA
߹յϵ: ܽŵv-iͼеĹյͼΣ¶Ȳ仯ϵжƯĹԪdzа

׼

߲ԲԺ

1 x 64 way test cable (64ͨ)

1 x 64 way split test cable (2X32ͨ)

1 x V-I probe assembly (V-I߲̽)

1 x BDO cable (ͨźŲ)

1 x Short locator cable (·̽)

1 x Ground clip (ӵźż)

1 x PSU lead set (Դ)


ͨѶ
ͨѶӿ PCI interface (ͨѶӿ)
ͨѶӿڼ MultiLink case () Ϊ USB.ͨѶ˿
External case (ѡ) 5װ۵SYSTEM 8 (USB.ͨѶ˿).

ݿ
ɲԪ: TTL 54/74 logic, CMOS, Memory, Interface, LSI, Microprocessor, PAL/EPLD, Linear, Package, Special aʹ߶
ɲԪװ: DIL, SOIC, PLCC, QFPûԼòԼкת

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